Fault Ride Through Capability Analysis of Cascaded Multilevel Inverter System

Abstract

Photovoltaic is defendable, clean, conserving, ubiquitous and everlasting system. But still compactness, protection, reliability and monitoring functions are receiving more and more attention in this area. This paper discusses the effect of faults on multilevel cascaded H-bridge inverter when connected to grid through transmission lines. single phase double stage cascaded multilevel inverter in different cases with enhanced FRT capability is presented here. In this paper, SDBR concept has been used.

Introduction

I. INTRODUCTION

 To maintain the connectivity of inverter to the power system during the fault by use of technique called Series dynamic braking resistor (SDBR). The whole model implemented with use of MATLAB in which LG fault taken in consideration for required study to perform various analysis with the use of SDBR. Simulation result of grid voltage, load voltage, load current under LG fault condition represented in form of graph with respect to time for cascaded multilevel inverter without SDBR and with SDBR. Considering the FRT capability, there are four major reasons for inverter disconnection during grid faults, viz. (i) over current at the ac side, (ii) excessive dc-link voltage, (iii) loss of grid voltage synchronization, (iv) The reactive current injection imbalance. If system remains connected during these abnormalities, it indicates improved FRT capability of system. Here first two conditions have been focused mainly and achieved better results in simulation.

II. SDBR CONTROL
Series dynamic braking resistor (SDBR) is employed in first time by Mitra Mirhosseini et al [11] in their paper, where voltage error was the reference of controller. Here SDBR has been used by taking current error ?I as reference for controller. Fig 1 shows the basic concept which has been used here such that PV inverter needs not disconnect immediately from the grid at the occurrence of the fault.

Under normal conditions by pass switch remains close, thus causes for bypassing the braking resistor. Grid current increment above a selected reference point send signal to the switch for opening the current path. The braking resistor would persist in the system as long as the grid current of the PV generator is above a set value. When the fault is cleared, the system becomes stable and the grid current becomes same as the reference value, the switch would close and the system would be rehabilitated to its normal condition.

III. PROPOSED GRID CONNECTED SOLAR SYSTEM

Fig 2 represents the simplified diagram of the grid connected PV plant followed by double-stage conversion block employed to dispatch the AC power to the grid. The inverter is capable of maintaining constant 230V DC voltage at the DC link. Solar inverter feeds power to the grid and also satisfy local load. A L-G fault near the grid side is shown in figure. To protect the inverter from voltage imbalance, series dynamic breaking resistance (SDBR) has been used in the system. The work using single stage H bridge inverter having spikes for 0.0009 second [19].

IV. MATLAB Implementation

Fig 3 shows the implemented MATLAB Simulink model of the proposed system described above section. Here relay and circuit breaker concept has been used with SDBR to control fault current.

1. LG Fault duration = 0.4 to 0.5 seconds and,
2. SDBR 100 ohm.

The system under study is simulated in MATLAB/Simulink, and its different responses are examined under all possible working conditions. Graphical results of Grid voltage, load voltage and load current has shown with respect to time under normal condition, during the fault without application of SDBR and with SDBR is also shown here.

V. SIMULATION RESULTS UNDER L-G FAULT CONDITION

At the time of L-G fault occur near grid side, then high magnitude of grid current causes high switching of inverter current as shown in Fig 4. In this situation voltage collapse occur across load due to which current magnitude become low. But PV power still remains in the system, which is dangerous for solar inverter.

VI.  SIMULATION RESULTS UNDER PROPOSED CONDITION
Above problem can be removed, if time of large switching oscillation of inverter current is reduced. For this fast current error controlled SDBR switch has been used, due to which there is no need to disconnect the solar inverter during the fault which is proved in Fig 5. It can be seen that fault time is reduced completely as compare to single stage work [19]. Thus, fault ride through capability of solar inverter has been improved. Thus, application of SDBR in single-phase double-stage solar inverter is implemented successfully. 

Conclusion

We have implemented the application of SDBR for improving the FRT capability of grid connected single phase cascaded multilevel solar inverter. An entire modelling of grid connected PV system is presented. As per the simulated results inverter current has very low harmonic content and high percentage of power conversion. From the results of Single-Phase Cascaded Double Stage Multilevel Solar Fed Inverter and single-phase H-bridge inverter, we can also conclude that cascaded multilevel inverter got better THD performance, handled fault in better manner and with of use of SDBR in our proposed system switching spikes mitigated completely. No need to disconnect the inverter during the fault, and it increase fault ride through capability of solar inverter The complete work also enhances the new dimension in the solar industries in smart grid application as local distribution system.

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Copyright

Copyright © 2022 Gajender Singh, Dr. M. K. Bhaskar, Manish Parihar, Vinay Hans. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.