A Power Quality Improved EV Charger by Using Bridgeless CUK Converter

Abstract

This study designs and develops an improved bridgeless (BL) Cuk converter-based electric vehicle (EV) battery charger with a high-power factor and higher efficiency. It offers a low-cost, high-power-density-based charging solution for EVs. This charger has fewer components functioning during a single switching cycle, which decreases the extra conduction loss experienced by the typical charger\'s diode bridge rectifier. As a result, it boosts the charger\'s efficiency. The suggested topology also avoids the undesired capacitive coupling loop and unwanted conduction via the body diode of the inactive switch in the previously developed BL Cuk converter. This considerably enhances the charger\'s efficiency. A flyback converter synchronises the orders for constant current and constant voltage charging. The suggested charger draws a sinusoidal current from an alternating current main, and the overall harmonic distortion in the supply current is kept within the IEC 61000-3-2 requirements. The suggested charger\'s increased efficiency and power quality indices are studied to verify its good charging performance under all operational situations.

Introduction

I. INTRODUCTION

Battery-powered electric vehicles (BEVs) already outnumber traditional gasoline-powered cars in terms of the long-term growth of the modern transportation industry [1]. An ac–dc converter-based on-board or off-board charger is a critical piece of electric vehicle supporting equipment for facilitating battery charging in BEVs (EV). Various off-board and on-board topologies of EV battery chargers with unidirectional or bidirectional configurations are studied in the literature under level 1, level 2, or level 3 categories. An off-board power supply, in addition to high power density and a compact form factor.

To increase energy consumption when charging, chargers must have improved power quality (PQ) features. A standard EV charger with a diode bridge rectifier (DBR) draws a peaky current from the mains, lowering the input power factor (PF) and causing up to 55.3 percent total harmonic distortion (THD). Table I shows the battery rating and specs of the EV under test. The recorded waveforms clearly show that the performance of the DBR fed charger does not meet international criteria such as the IEC 6100-3-2 standard. To address these issues, better PQ-based EV chargers are being intensively researched in the literature. These chargers draw a sinusoidal input current with a high PF, and the output voltage is stiffly controlled at a constant amount. Several topologies of front-end power-factor-correction (PFC) converters are studied in the literature for EV chargers, depending on whether they are off-board or on-board. This relates to several on-board EV chargers with substantial advantages in terms of power density and efficiency. However, because of the lower vehicle weight and capacity to charge at high power levels, an off-board design is a more viable choice. Different PFC converter topologies with interleaved input at the front end and zero-voltage-switching approaches are presented. Interleaving two-phase inputs has the advantage of lowering output ripple current and reducing the size of the inductor. Furthermore, the semiconductor devices are run in parallel, resulting in lower conduction losses. However, unlike the traditional boost PFC converter, interleaved PFC converters do not provide a remedy for poor thermal use of PFC switches. This paper discusses an LLC resonant converter fed EV charger, which has the added benefit of reduced electromagnetic interference (EMI) noise and switching loss. However, the resonant converter's complicated mathematical analysis renders it unsuitable for EV charging across a large input voltage range. A full-bridge PFC converter appears to be the most promising option for EV chargers, but building separate gate drivers for four semiconductor switches increases the size and complexity. As a result, several unidirectional PFC off-board EV chargers are addressed in order to give ease of application while keeping the benefits of high-power density and efficiency.

Using different single-stage and two-stage PFC converters leads to perceptible PQ indices at the input of these chargers. In the literature, many single-stage PFC-converter-based EV charger topologies have been published. Because of its low part count, the single-stage charger is highly dependable. However, the existence of 100-Hz ripple content in the output current necessitates extremely high DC-link capacitance. A two-stage charger with a PFC converter is a widely feasible option in the EV market for medium power levels up to 1 kW. Because of the considerable conduction loss experienced by the four input diodes, the DBR-fed PFC converter reduces the charger's efficiency. As a result, with fewer components conducting during one switching cycle and lower conduction loss, a bridgeless (BL) PFC converter is the most practical approach for improving PQ in an EV charger.

Because it can both buck and boost the input voltage, the BL buck–boost converter is the most appealing solution for PFC in EV chargers. We describe and analyse a variety of buck–boost configuration-based converters, including Cuk and SEPIC converters. Despite the fact that the Zeta, Cuk, and SEPIC PFC converters have minimal input current ripple and a large duty cycle fluctuation range, the SEPIC converter, unlike the Cuk converter, has a discontinuous output current. As a result of the minimal ripple in the battery current, the Cuk converter gives more practicable charging characteristics to the battery. Many topologies of the BL-Cuk converter based on the typical PFC Cuk converter are studied in the literature [20–23]. All of these topologies have restrictions in terms of the number of components, losses, efficiency, and coupling requirements, which are explored more below.

1. As shown in Fig. 1(b), Topology-1 in [20] has advantages such as lower input current, less EMI, and ease of installation. However, it has a circulating current problem [as shown in Fig. 1(c)], which produces extra losses 0f two-thirds of the supply voltage owing to the connectivity of two intermediate capacitors, C1 and C2.
2. Topology-2 employs a significant number of devices, such as two output capacitors, with the disadvantage of a floating terminal for load between two capacitors at output. Furthermore, because of the placement of switches for the independent half of the supply voltage, as illustrated in Fig. 2, it has the problem of floating neutral (d).
3. Topology-3 in [20] is found to be lossy because the body diode of the inactive switch S2 conducts current via Li2 during the positive half cycle of the input voltage, as seen in Fig. 2. (e). As a result, the circuit always incurs some losses across the inactive switch's body diode due to partial return current flow through it during other half-cycle operation.
4. The other BL Cuk converters in [21] and [23] are shown in Fig. 2(f) and (g), respectively, and have the same advantages of low component count and lower semiconductor device stress as the typical Cuk converter. However, coupled induction in both the input and output inductors is not conceivable for any of these converters. This may result in greater output and input ripple, which is undesirable for battery service life.

Fig. 2. Different BL Cuk converters. (a) Conventional Cuk converter. (b) Topology-1 [20]. (c) Circulating current due to interconnection of C1 and C2 in topology-1[20]. (d) Topology-2 [20]. (e) Topology-3 with return current [20] through the body diode. (f) Topology in [21]. (g) Topology in [23].

During the constant current (CC) and constant voltage (CV) charging zones, the converter manages the input voltage of the flyback converter, which is used to maintain the required charging current through the battery. A prototype is created, and the increased PQ performance of the proposed EV charger, as defined by the IEC 61000-3-2 standard, is demonstrated during steady state and during broad ac voltage swings.

II. CONFIGURATION AND OPERATION

Figures 3 and 4 depict the configuration and operation of the planned PQ improved EV charger. The Cuk converter cell, consisting of Li1–S1–Do1–Lo1–Dp, is in operation during the positive half cycle. However, the other Cuk converter cell, Li2–S2–Do2–Lo2–Dn, is active during the negative half line. For both Cuk converter cells, the input inductors Li1 and Li2 are set to function in the continuous conduction mode (CCM). However, the output inductors Lo1 and Lo2 are designed in such a way that the output diode current, id, reaches zero and the converter enters DCM after one switching cycle. The intermediate capacitors C1 and C2 are chosen so that the voltage across the capacitors remains constant throughout the switching time. It is worth noting that both switches, S1 and S2, are powered by the same pulse width modulation (PWM) signal, lowering system cost and circuit complexity.

The PFC Cuk converter's output voltage is kept constant by using single-loop voltage feedback control [27], [28], which lowers the charger cost because only one voltage sensor is used. The flyback converter is designed to work in the DCM [29] mode, with a cascaded proportional-integral (PI) controller controlling the battery charging commands during the CC and CV charging periods. The output inductor current in the Cuk converter during PFC in the DCM is depicted in Fig. 4.

A. Operation of the BL Cuk PFC Converter

Only the positive half cycle of the BL converter is considered due to waveform symmetry, as shown in Fig. 5(a)–(c). The operational phases of the Cuk converter are illustrated in this section to demonstrate how the proposed EV charger works.

1. P-I Mode [0 t DCuk Ts Switch-ON Period]:

When the gate pulse to switch S1 is applied, the first mode of the positive half-cycle operation (P-I) begins at t1. The current flowing through the input inductor Li1 increases linearly as the slope of Vspk (t)/Li1 increases. As the positive line diode Dp is conducting, the current flows via the path vs–Li1–S1–Dp–vs. Figure 6 depicts the essential switching waveforms associated with all three modes. Through the switch S1 and the output inductor, Lo1, the voltage across the intermediate capacitor C1 begins to decrease, giving the appropriate load current to the flyback converter. Due to the polarity of the intermediary capacitor voltage, C1, the output diode Do1 stays in reverse bias during this interval. The peak current stress across switch S1 during this mode is given as 

                                                            Is1pk (1) = V spk DCuk Ts                                                                                                       (1)

where Leq represents the proposed converter's equivalent circuit inductance, i.e., the input inductor Li1 and the output inductor Lo1. The maximum value of the input alternating voltage is Vspk, the ON period for switch S1 is DCuk, and the overall switching time is Ts.

            Fig. 5. Circuit operation of the EV charger with BL PFC Cuk converter during the positive half cycle. (a) Mode P-I. (b) Mode P-II. (c) Mode P-III.

2. Mode P-II [Switch OFF Period, DCuk Ts ≤ t ≤ D1Ts]

When switch S1 is turned off at instant t2, this mode begins. As shown in Fig. 5, the output diode Do1 begins to conduct and the voltage across the intermediate capacitor begins to rise as the input inductor Li1 begins to release the stored energy via C1 and Do1 (b). The load current is provided by the output inductor Lo1, which releases the stored energy via the output diode Do1 and dc-link capacitor CCuk.

The given equation represents the current iLo1 through the output inductor.    

where VCuk is the BL Cuk converter's output voltage.

When the current via the output diode becomes zero at instant 3, the switching period finishes. The normalised duty cycle value in this switching mode is determined using the following relation:

DCuk Ts + D1Ts Ts, which provides DCuk + D1 1.                                                 (3)

   During mode-II operation of the proposed Cuk converter

When n is the converter's isolation transformation ratio, Ts is the switching time, and Ton and Toff are the switch-ON and switch-OFF phases. n = 1 in the proposed non-isolated Cuk converter. Now, replace Vs = Vspk Sinωt and dc gain of the converter with M = VCuk/Vspk.

The relationship in (4) is altered as follows:

D1Ts = nDCukTs (Vspksinωt)

VCuk

3. Mode P-III [DCM Mode, D1Ts ≤ t ≤ Ts]:

This is the DCM mode, in which the current through the output diode Do1 becomes zero as the sum of the input and output inductor currents becomes zero. For this, the current through one of the inductors (here, the output inductor) must be reversed, as shown in Fig. 5 (c), or it will become zero before the end of mode-II (instant t3 in Fig. 6). As seen in Fig. 6, a constant current I passes across the circuit at this time. From their starting levels, the inductor currents undergo a fresh switching cycle: I for iLi1 and I for iLo1. C1 (the intermediate capacitor) continues to charge via the input inductor Li1 and output diode Do1. The DCM time period is provided as

B. Differential Aspect of the Proposed PFC Converter

The following sections explain the differences between the proposed PFC converter and the BL Cuk topologies 1 and 3 [20].

1. The intermediate capacitors in both halves operate independently; because there is no connectivity between C1 and C2, circulation losses are eliminated, resulting in higher charger efficiency.
2. Due to the traditional control, the body diode of the inactive switch S2 is always conducting the current during the positive half cycle of the input voltage, as shown in Fig. 2 (e). The following sections explain the differences between the proposed PFC converter and the BL Cuk topologies 1 and 3 [20].
3. Due to the traditional control, the body diode of the inactive switch S2 is always conducting the current during the positive half cycle of the input voltage, as shown in Fig. 2 (e). This means that when switch S1 is turned on during the positive half cycle, current flows not only through Dp but also via the body diode of switch S2 and inductor Li2. When switch S1 is turned off, current flows not only through the line diode Dp via the output diode Do1, but also through the inductor Li2 via the body diode, Dp. The same is true for the negative half-cycle operation with switch S2. This occurs when a single PWM signal is applied to only one of the switches during one half, i.e., S1 or S2, and the other switch is maintained completely off for the other half. As a result, as shown in Fig. 7(a) and (b), the circuit always incurs some losses across the body diode of the inactive switch (S1 or S2) due to partially returned current flowing through it during the corresponding half-cycle operation.
4. Unlike in Fig. 2, there is no return current through the body diode of inactive switches in the relevant half cycle due to applied control (e). The control of the PFC converter is straightforward due to the use of the same gate drive and control circuitry for each half cycle, i.e., both switches S1 and S2 work in synchronism with the same driver signal. In other words, the same driver signal and interleaved driver signal can be utilised to operate switches S1 and S2 to reduce conduction loss through the body diode of the inactive switches. As a result, losses in the body diode are decreased. The actual operating modes differ slightly from those shown in Figs. 5(a)–(c) with the same driver signal. The preceding fact is supported by Figs. 8(a) and (b), which show the proposed converter operating with the same control signal during the switch-ON and switch-OFF periods during the positive half of the supply cycle, respectively.

Fig. 8. Operating modes of the proposed converter with same driver signal during the positive half line during (a) switch ON and (b) switch OFF.

C. Operation of the Flyback Converter

The DCM of the high frequency transformer's magnetising inductance is used to examine the operation of the flyback converter (HFT). During mode-I, the current flowing through the magnetic inductance Lmf rises linearly and stores energy when the flyback switch Sf is turned on. During this instant, the output diode, Df, is reverse biased due to the HFT's dot convention. The current flowing through the switch Sf is denoted as  

where Dfb is the needed duty cycle and Tsf (1/fsf) is the switching period of the flyback converter, which in this article is set at 1/50 kHz. Taking the flyback transformer's transformation ratio as N.

Mode II begins when switch Sf is turned off at instant t2. As the polarity of the HFT is reversed during the switch OFF moment and the output diode Df becomes forward biased, the output power is provided to the battery. The switch current is f and diode voltage VDf are both zero. The current flowing through the magnetising inductance at this time is denoted by 

III. DESIGN OF THE PROPOSED PFC CONVERTER-BASED CHARGER

The cost of the EV charger is directly connected to the PFC converter's sensing needs [30–32]. The CCM's control strategy employs the current multiplier technique to offer intrinsic wave-shaping and dc-link regulation. The CCM requires a greater number of sensors due to the need to sense the output voltage as well as the input voltage and current. The primary benefit of CCM operation is that it reduces current stress on PFC converter switches and components. However, the required sensors are decreased in DCM operation since the control strategy is based on the voltage follower approach and the only quantity to be detected is the converter's output voltage. As a result, the DCM-based design approach is appropriate in the proposed work to reduce cost and complexity. The inherent PFC for the proposed BL Cuk converter in DCM mode is shown below.

The average input and output inductor currents over the switching period Ts are expressed as

As a result, the value of the output inductance is set to be smaller than the expected amount, i.e., 0.15 mH, to assure the charger's UPF operation throughout a wide input voltage range.

The suggested converter's input current wave-shaping function is directly affected by the energy transfer capacitor, C1. As a result, the design of this capacitor is constrained by the following constraints: The resonant frequencies fr of Li1, Lo1, and C1 must be more than the line frequency f during the proposed converter's operation in respective halves and less than the converter switching frequency, fs, which ensures the CV across one switching cycle, i.e., f fr fs, such that

The suggested study considers the resonance frequency fr to be 1.5 kHz. The voltage rating of this energy transfer capacitor is determined by the voltage sum of the charger's peak input voltage and output voltage. To eliminate any resonance between C1,2 and Leq during each half cycle, the energy transfer capacitor, C1,2, is calculated as

IV. CONTROL OF THE PROPOSED EV CHARGER

A. Control of the BL PFC Converter

The proposed BL PFC converter is intended to operate in the DCM mode, which employs voltage-follower mode control. The voltage-follower control is implemented using a PI controller, which moulds the mains current to match the input voltage and ensures that the output of the BL converter remains constant despite significant variations in the input voltage. A voltage sensor is used to detect any variation in voltage (VCuk) caused by an abrupt shift in the main voltage. The voltage measured is compared to the appropriate reference voltage (VCukref). The voltage feedback controller receives the error VCuk. The error signal and control signal created during the kth sampling moment are expressed as

                                             VCuke(n) = VCukref(n) − VCuk(n)

                             CvCuk(n) =   CvCuk (n − 1) + KpCuk {VCuke(n)− VCuke (n − 1)} + KiCukVCuke(n)

where KpCuk and KiCuk are the tuned proportional and integral gain constants for the PI controller, respectively. Following processing by the PI controller, a control signal CvCuk is initiated, which uses a PWM comparator to vary the duty cycle to deliver the desired output voltage. The control signal, CvCuk, is compared to a high-frequency wave, Sc, generated internally at the converter switching frequency, fs, in the PWM comparator. As seen in Figs. 7 and 8, switching occurs during the corresponding halves.

B. Control of the Flyback Converter

To provide CC charging to the battery under all operational conditions, the flyback converter is regulated by a cascaded dual PI controller at the output. The battery voltage, Vbatt, is measured and compared to a constant reference voltage, Vbatt, for this purpose. A voltage PI controller provides the voltage error, Vbatte. The PI controller output is made to saturate at the maximum charging current limit so that the output of the outer PI controller loop establishes the reference Ibatt for the current in the inner current loop. For the kth sample instance, the relevant equations for error Vbatte and PI controller output CVbatt are provided as

                                                Vbatte(n) = Vbatt ∗ (n) − Vbatt(n)

          CV batt(n) = CV batt (n − 1) + KpV batt {Vbatte(n) − Vbatte (n − 1)} + KiV battVbatte(n)

The voltage PI controller parameters are represented here by KpV batt and KiV batt. However, the EV battery's sensed charging current, Ibatt, is compared to this reference value, and the difference is supplied to the inner current PI controller. when the voltage controller's output is saturated at the reference charging current value and the voltage PI controller loop is turned off. The needed pulses are generated by comparing the current PI controller output to a sawtooth wave to charge the battery in the CC mode using the PWM generating block.

V. RESULTS

Similarly, there is no return current visible through Li1 during the –ve half cycle, as seen in Fig. 3.6 for the prior BL Cuk converter topology-3 with conventional regulation. It is worth noting that a small number of current flows via Li2 during the +ve half-line of a BL Cuk converter with conventional control, which is acquired due to the path given by the body diode of the inactive switch S2 during the positive half. Similarly, Li1 shows a small amount of current flowing through it during the negative half line because the body diode of the inactive switch S1 is conducting at this time. As a result of the losses experienced by the body diode of the inactive switch, the converter efficiency is seen to be low in Figs. e and f.                    

Conclusion

A better PQ-based EV charger is proposed, featuring a BL Cuk converter that uses fewer conducting components in a single switching cycle. Using a single-voltage feedback control, the proposed PFC Cuk converter provides outstanding PFC characteristics in the DCM mode. As a result, the charger\'s size is lowered. The suggested topology also eliminates the undesired capacitive coupling loop, as well as the unwanted conduction through the body diode of the inactive switch in the previously developed BL Cuk converter. This enhances the charger\'s efficiency greatly. The proposed charger demonstrated good charging behaviour at the steady state and during a 50% change in grid voltage. However, the proposed charger\'s PQ assessment is accomplished using the IEC 61000-3-2 guidelines over a large input voltage range. As a result, the suggested charger provides a viable EV charging alternative for increased PQ and efficiency.

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Copyright

Copyright © 2022 Ganesh Prasad Reddy Jonnala, Sairam Mudigonda, Mohan Dharma Nayak Malavathu, Nagesh Mala, Supriya Velupula. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.